View 3NV04D_5398258.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

? february 2003 1/14 vns3NV04D omnifet ii: fully autoprotected power mosfet 1 n linear current limitation n thermal shut down n short circuit protection n integrated clamp n low current drawn from input pin n diagnostic feedback through input pin n esd protection n direct access to the gate of the power mosfet (analog driving) n compatible with standard power mosfet description the vns3NV04D is a device formed by two monolithic omnifet ii chips housed in a standard so-8 package. the omnifet ii are designed in stmicroelectronics vipower m0-3 technology: they are intended for replacement of standard power mosfets from dc up to 50khz applications. built in thermal shutdown, linear current limitation and overvoltage clamp protects the chip in harsh environments. fault feedback can be detected by monitoring the voltage at the input pin. type r ds(on) i lim v clamp vns3NV04D 120 m w (*) 3.5 a (*) 40 v (*) so-8 block diagram source2 overvoltage linear drain1 source1 clamp current limiter over temperature gate control drain2 overvoltage clamp linear current limiter gate control over temperature input2 input1 (*)per each device
2/14 vns3NV04D absolute maximum rating connection diagram (top view) symbol parameter value unit v dsn drain-source voltage (v inn =0v) internally clamped v v inn input voltage internally clamped v i inn input current +/-20 ma r in minn minimum input series impedance 220 w i dn drain current internally limited a i rn reverse dc output current -5.5 a v esd1 electrostatic discharge (r=1.5k w , c=100pf) 4000 v v esd2 electrostatic discharge on output pins only (r=330 w , c=150pf) 16500 v p tot total dissipation at t c =25c 4 w t j operating junction temperature internally limited c t c case operating temperature internally limited c t stg storage temperature -55 to 150 c 1 current and voltage conventions drain 2 drain 1 drain 2 drain 1 input 2 source 1 source 2 input 1 1 4 5 8 drain 1 input 1 source 2 i in1 v in1 input 2 i in2 source 1 drain 2 v in2 i d2 i d1 v ds1 v ds1 r in1 r in2
3/14 vns3NV04D thermal data (*) when mounted on a standard single-sided fr4 board with 50mm 2 of cu (at least 35 m m thick) connected to all drain pins of the relative channel. on symbol parameter value unit r thj-lead thermal resistance junction-lead (per channel) max 30 c/w r thj-amb thermal resistance junction-ambient max 80(*) c/w symbol parameter test conditions min typ max unit v clamp drain-source clamp voltage v in =0v; i d =1.5a 40 45 55 v v clth drain-source clamp threshold voltage v in =0v; i d =2ma 36 v v inth input threshold voltage v ds =v in ; i d =1ma 0.5 2.5 v i iss supply current from input pin v ds =0v; v in =5v 100 150 m a v incl input-source clamp voltage i in =1ma i in =-1ma 6 -1.0 6.8 8 -0.3 v i dss zero input voltage drain current (v in =0v) v ds =13v; v in =0v; t j =25c v ds =25v; v in =0v 30 75 m a symbol parameter test conditions min typ max unit r ds(on) static drain-source on resistance v in =5v; i d =1.5a; t j =25c v in =5v; i d =1.5a 120 240 m w electrical characteristics (-40c < t j < 150c, unless otherwise specified) off (per each device) 1
4/14 vns3NV04D electrical characteristics (continued) (t j =25c, unless otherwise specified) dynamic switching source drain diode protections (-40c < t j < 150c, unless otherwise specified) (*) pulsed: pulse duration = 300 m s, duty cycle 1.5% symbol parameter test conditions min typ max unit g fs (*) forward transconductance v dd =13v; i d =1.5a 5.0 s c oss output capacitance v ds =13v; f=1mhz; v in =0v 150 pf symbol parameter test conditions min typ max unit t d(on) turn-on delay time v dd =15v; i d =1.5a v gen =5v; r gen =r in minn =220 w (see figure 1) 90 300 ns t r rise time 250 750 ns t d(off) turn-off delay time 450 1350 ns t f fall time 250 750 ns t d(on) turn-on delay time v dd =15v; i d =1.5a v gen =5v; r gen =2.2k w (see figure 1) 0.45 1.35 m s t r rise time 2.5 7.5 m s t d(off) turn-off delay time 3.3 10.0 m s t f fall time 2.0 6.0 m s (di/dt) on turn-on current slope v dd =15v; i d =1.5a v gen =5v; r gen =r in minn =220 w 4.7 a/ m s q i total input charge v dd =12v; i d =1.5a; v in =5v i gen =2.13ma (see figure 5) 8.5 nc symbol parameter test conditions min typ max unit v sd (*) forward on voltage i sd =1.5a; v in =0v 0.8 v t rr reverse recovery time i sd =1.5a; di/dt=12a/ m s v dd =30v; l=200 m h (see test circuit, figure 2) 107 ns q rr reverse recovery charge 37 m c i rrm reverse recovery current 0.7 a symbol parameter test conditions min typ max unit i lim drain current limit v in =5v; v ds =13v 3.5 5 7 a t dlim step response current limit v in =5v; v ds =13v 10 m s t jsh overtemperature shutdown 150 175 200 c t jrs overtemperature reset 135 c i gf fault sink current v in =5v; v ds =13v; t j =t jsh 10 15 20 ma e as single pulse avalanche energy starting t j =25c; v dd =24v v in =5v; r gen =r in minn =220 w; l=24mh (see figures 3 & 4) 100 mj 2
5/14 vns3NV04D protection features during normal operation, the input pin is electrically connected to the gate of the internal power mosfet through a low impedance path. the device then behaves like a standard power mosfet and can be used as a switch from dc to 50khz. the only difference from the users standpoint is that a small dc current i iss (typ. 100 m a) flows into the input pin in order to supply the internal circuitry. the device integrates: - overvoltage clamp protection: internally set at 45v, along with the rugged avalanche characteristics of the power mosfet stage give this device unrivalled ruggedness and energy handling capability. this feature is mainly important when driving inductive loads. - linear current limiter circuit: limits the drain current i d to i lim whatever the input pin voltage. when the current limiter is active, the device operates in the linear region, so power dissipation may exceed the capability of the heatsink. both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold t jsh . - overtemperature and short circuit protection: these are based on sensing the chip temperature and are not dependent on the input voltage. the location of the sensing element on the chip in the power stage area ensures fast, accurate detection of the junction temperature. overtemperature cutout occurs in the range 150 to 190 c, a typical value being 170 c. the device is automatically restarted when the chip temperature falls of about 15c below shut-down temperature. - status feedback: in the case of an overtemperature fault condition (t j > t jsh ), the device tries to sink a diagnostic current i gf through the input pin in order to indicate fault condition. if driven from a low impedance source, this current may be used in order to warn the control circuit of a device shutdown. if the drive impedance is high enough so that the input pin driver is not able to supply the current i gf , the input pin will fall to 0v. this will not however affect the device operation: no requirement is put on the current capability of the input pin driver except to be able to supply the normal operation drive current i iss . additional features of this device are esd protection according to the human body model and the ability to be driven from a ttl logic circuit. 1
6/14 vns3NV04D 1 fig.2: test circuit for diode recovery times l=100uh a b 8.5 w v dd r gen fast diode omnifet a d i s 220 w b omnifet d s i v gen fig.1: switching time test circuit for resistive load r gen v gen v d t i d 90% 10% t v gen t d(on) t d(off) t f t r
7/14 vns3NV04D 1 1 fig. 3: unclamped inductive load test circuits fig. 5: input charge test circuit fig. 4: unclamped inductive waveforms r gen p w v in v in
8/14 vns3NV04D 1 1 1 1 1 source-drain diode forward characteristics derating curve static drain source on resistance static drain-source on resistance vs. input voltage transconductance static drain-source on resistance vs. input voltage 00.511.522.533.544.555.5 id (a) 0 1 2 3 4 5 6 7 8 9 10 11 gfs (s) vds=13v tj=25oc tj=150oc tj=-40oc 3 3.5 4 4.5 5 5.5 6 6.5 vin(v) 0 25 50 75 100 125 150 175 200 225 250 275 300 rds(on) (mohms) id=3.5a id=1a id=3.5a id=1a id=3.5a id=1a tj=25oc tj=150oc tj=-40oc 3 3.5 4 4.5 5 5.5 6 6.5 vin(v) 0 25 50 75 100 125 150 175 200 225 250 rds(on) (mohms) id=1.5a tj=150oc tj=-40oc tj=25oc 0123456789101112 id (a) 600 650 700 750 800 850 900 950 1000 1050 1100 vsd (mv) vin=0v 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5 0.55 id(a) 0 100 200 300 400 500 600 700 800 900 1000 rds(on) (mohms) tj=25oc tj=150oc tj=-40oc vin=2.5v
9/14 vns3NV04D 1 1 1 1 static drain-source on resistance vs. id turn on current slope transfer characteristics turn on current slope input voltage vs. input charge turn off drain source voltage slope 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 rg(ohm) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 di/dt(a/us) vin=5v vdd=15v id=1.5a 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 rg(ohm) 0 0.25 0.5 0.75 1 1.25 1.5 1.75 di/dt(a/usec) vin=3.5v vdd=15v id=1.5a 01234567891011 qg (nc) 0 1 2 3 4 5 6 7 8 9 vin (v) vds=1v id=1.5a 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 rg(ohm) 0 25 50 75 100 125 150 175 200 225 250 275 300 dv/dt(v/usec) vin=5v vdd=15v id=1.5a 1.522.533.544.555.56 vin (v) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 idon (a) vds=13.5v tj=150oc tj=25oc tj=-40oc 00.511.522.533.54 id (a) 0 25 50 75 100 125 150 175 200 225 250 rds(on) (mohms) tj=25oc tj=150oc tj= - 40oc vin=5v
10/14 vns3NV04D 1 1 1 1 1 1 turn off drain-source voltage slope switching time resistive load output characteristics capacitance variations switching time resistive load normalized on resistance vs. temperature 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 rg(ohm) 0 25 50 75 100 125 150 175 200 225 250 275 300 dv/dt(v/usec) vin=3.5v vdd=15v id=1.5a 0 5 10 15 20 25 30 35 vds(v) 50 100 150 200 250 300 350 c(pf) f=1mhz vin=0v 012345678910 vds (v) 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 id (a) vin=4v vin=5v vin=3v 0 250 500 750 1000 1250 1500 1750 2000 2250 2500 rg(ohm) 0 0.5 1 1.5 2 2.5 3 3.5 4 t(usec) vdd=15v id=1.5a vin=5v td(off) tr td(on) tf 3.25 3.5 3.75 4 4.25 4.5 4.75 5 5.25 vin(v) 0 100 200 300 400 500 600 700 800 900 t(nsec) vdd=15v id=1.5a rg=220ohm tf tr td(off) td(on) -50 -25 0 25 50 75 100 125 150 175 tc )oc) 0.5 1 1.5 2 2.5 3 3.5 4 rds(on) (mohm) vin=5v id=1.5a
11/14 vns3NV04D 1 1 normalized input threshold voltage vs. temperature step response current limit normalized current limit vs. junction temperature 5 7.5 1012.51517.52022.52527.53032.5 vdd(v) 7.5 8 8.5 9 9.5 10 10.5 11 11.5 12 12.5 13 tdlim(usec) vin=5v rg=220ohm -50 -25 0 25 50 75 100 125 150 175 tc (oc) 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 vinth (v) vds=vin id=1ma -50 -25 0 25 50 75 100 125 150 175 tc (oc) 0 1 2 3 4 5 6 7 8 9 10 ilim (a) vin=5v vds=13v
12/14 vns3NV04D 1 dim. mm. inch min. typ max. min. typ. max. a 1.75 0.068 a1 0.1 0.25 0.003 0.009 a2 1.65 0.064 a3 0.65 0.85 0.025 0.033 b 0.35 0.48 0.013 0.018 b1 0.19 0.25 0.007 0.010 c 0.25 0.5 0.010 0.019 c1 45 (typ.) d 4.8 5.0 0.188 0.196 e 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 3.81 0.150 f 3.8 4.0 0.14 0.157 l 0.4 1.27 0.015 0.050 m 0.6 0.023 f 8 (max.) so-8 mechanical data
13/14 vns3NV04D 1 so-8 tube shipment (no suffix) all dimensions are in mm. base q.ty 100 bulk q.ty 2000 tube length ( 0.5) 532 a 3.2 b 6 c ( 0.1) 0.6 tape and reel shipment (suffix 13tr) all dimensions are in mm. base q.ty 2500 bulk q.ty 2500 a (max) 330 b (min) 1.5 c ( 0.2) 13 f 20.2 g (+ 2 / -0) 12.4 n (min) 60 t (max) 18.4 tape dimensions according to electronic industries association (eia) standard 481 rev. a, feb 1986 all dimensions are in mm. tape width w 12 tape hole spacing p0 ( 0.1) 4 component spacing p 8 hole diameter d ( 0.1/-0) 1.5 hole diameter d1 (min) 1.5 hole position f ( 0.05) 5.5 compartment depth k (max) 4.5 hole spacing p1 ( 0.1) 2 top cover tape end start no components no components components 500mm min 500mm min empty components pockets saled with cover tape. user direction of feed reel dimensions c b a
14/14 vns3NV04D information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the co nsequences of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this p ublication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectron ics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicr oelectronics. the st logo is a trademark of stmicroelectronics ? 2003 stmicroelectronics - printed in italy- all rights reserved. stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - u.s.a. http://www.st.com

▲Up To Search▲

Price & Availability of 3NV04D

	To Download 3NV04D Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .